This quick guide will explain how to include your Microblaze C program into the FPGA bitstream. Microblaze (soft MCU) is a useful tool for rapid prototyping/development. It can be used to program AXI IP Core or it can communicate with another device or memory without CPU participating. Also, it is quicker to implement SPI in C and use standard libriaries instead of writing SPI FSM in Verilog 🙂

Step 1 – Create a Vivado Design

Sample Vivado Design is shown below. In this design, Microblaze will drive a single pin with the AXI interface.

Record your “axi_gpio_0” address. You will write values to this address to set output to 1 or 0. Assign real pin to the port, generate the bitstream, export the hardware and open Vivado SDK.

Step 2 – Create an SDK Project 

• Create a Microblaze “Hello World” or “Emply” Application Project.
• Replace the code generated by SDK with:

#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"
#include "xil_io.h"

int main()
{
    init_platform();
    Xil_DCacheDisable();
    // This will toggle the pin
    while(1){
        Xil_Out32(0xA0000000,0x0);
        sleep(1);
        Xil_Out32(0xA0000000,0x0);
    }
    cleanup_platform();
    return 0;
}

Step 3 – Combine C Project & FPGA Design

• Go the folder with your Vivado Project.
• Open folder <your project name>.sdk.
• From <your project name>_hw_platform folder copy file <your project namet>.bit & <your project name>.mmi to the <your project name>.sdk folder.
• Copy <your C project>.elf file (it is in the “Debug” folder) to the <your project name>.sdk folder.
• In Vivado SDK in menu bar go -> Xilinx -> Launch Shell
• Run:

updatemem -meminfo <your project name>.mmi -data <your C project>.elf -bit <your project name>.bit -proc base_mb_i/microblaze_0 -out combined_bitstream.bit

This will build a new bitstream. combined_bitstream.bit” will program FPGA and Microblaze.

Comment: if you don’t know the name of your processor (In my case it is: “base_mb_i/microblaze_0”) type in mine and Vivado will suggest the processor.